TSMC holds 3nm volume production and capacity expansion ceremony, marking milestone for advanced manufacturing
HSINCHU, Taiwan, ROC – Dec. 29, 2022 – TSMC (TWSE: 2330, NYSE: TSM) today held a 3 nanometer (3 nm) volume production and capacity expansion ceremony at its new Fab 18 construction site in the Southern Taiwan Science Park. (STSP), bringing together suppliers, construction partners, central and local government partners, the Taiwan Semiconductor Industry Association and academics to witness a milestone in the company’s advanced manufacturing.
TSMC has laid a solid foundation for 3nm technology and capacity expansion, with Fab 18 located in the STSP serving as the company’s GIGAFAB® facility producing 5nm and 3nm process technology. Today, TSMC announced that 3nm technology has successfully entered volume production with good yields, and held a launch event for its Fab 18 Phase 8 facility. TSMC believes that 3nm technology to create end products with a market value of US$1.5 trillion within five years of volume production.
Phases 1 through 8 of TSMC Fab 18 each have a clean room area of 58,000 square meters, which is about twice the size of a standard logic factory. TSMC’s total investment in Fab 18 will exceed NT$1.86 trillion, creating over 23,500 construction jobs and over 11,300 direct employment opportunities in the high-tech sector. In addition to expanding 3nm capacity in Taiwan, TSMC is also building 3nm capacity at its site in Arizona.
TSMC also announced that the company’s global R&D center in Hsinchu Science Park will officially open in the second quarter of 2023, and will be staffed with 8,000 R&D staff. TSMC is also preparing its 2nm factories, which will be located in science parks in Hsinchu and central Taiwan, with a total of six phases taking place as planned.
TSMC President Dr. Mark Liu presided over the 3nm volume production and capacity expansion ceremony, and notable guests at the event included Vice Premier Shen Jong-chin, Minister of Economic Affairs Wang Mei-hua, Minister of Science and Technology Wu Tsung-tsong, Mayor of Tainan City Huang Wei. -che, General Manager of STSP Administration Office Su Chen-kang, Chairman of Fu Tsu Construction Cliff Lin, Chairman of United Integrated Services Belle Lee, Chairman of National Cheng Kung University Dr. Jenny Su, Chang Chun Petrochemical Chairman Chih-Chuan Tsai, Kuang Ming Enterprise Co., Ltd. vice president Eric Lin and vice president of Applied Materials Group Eric Yu, as well as representatives from TSMC’s construction partners, material and equipment suppliers, the Taiwan Semiconductor Industry Association, and academic institutions.
“TSMC maintains its technology leadership while investing significantly in Taiwan, continuing to invest and prosper with the environment. This 3nm volume production and capacity expansion ceremony demonstrates that we are taking concrete steps to develop cutting-edge technology and increase capacity in Taiwan. We aim to grow with our upstream and downstream supply chain and develop future talent from design to manufacturing, packaging and testing, equipment and materials to provide the most advanced process technology. competitive and reliable capacity for the world and drive technological innovation in the future. . ”
— TSMC President Dr. Mark Liu said at the ceremony.
TSMC is committed to flourishing with the natural environment through green manufacturing, and all of TSMC’s construction in the STSP meets Taiwan’s EEWH certification standards and US LEED green building certification standards. The facilities will also use water resources from the TSMC STSP Reclaimed Water Plant to gradually achieve the company’s goal of using 60% reclaimed water by 2030. Once volume production begins, Fab 18 will use 20% renewable energy to ultimately achieve the sustainability goal of 100% renewable energy and zero emissions.
TSMC’s 3nm process is the most advanced semiconductor technology in terms of power, performance, and area (PPA) and transistor technology, and a full-node advancement over the 5nm generation. Compared to 5nm (N5) process, TSMC’s 3nm process offers up to 1.6X logic density gain and 30-35% power reduction at the same speed, and supports the architecture innovative TSMC FINFLEX™.
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